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DRA821U2...ALM Folha de dados(PDF) 79 Page - Texas Instruments |
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DRA821U2...ALM Folha de dados(HTML) 79 Page - Texas Instruments |
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79 / 252 page  Table 6-102. System0 Signal Descriptions (continued) SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] MCU_OBSCLK0 Observation clock output for test and debug purposes only O C16 MCU_PORz MCU Domain cold reset I G19 MCU_RESETSTATz MCU Domain warm reset status output O B13 MCU_RESETz MCU Domain warm reset I A18 MCU_SAFETY_ERRORn Error signal output from MCU Domain ESM IO G18 MCU_SYSCLKOUT0 MCU Domain system clock output for test and debug purposes only O C20 PMIC_POWER_EN1 Power enable output for MAIN Domain supplies O C15 PMIC_WAKE0n PMIC WakeUp (active low) OD T19 PMIC_WAKE1n PMIC WakeUp (active low) OD E18 PORz Main Domain cold reset I H20 RESET_REQz Main Domain external warm reset request input I A15 6.3.25.3.3 VMON Table 6-103. VMON Signal Decription SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] VMON1_ER_VSYS Voltage Monitor, fixed 0.45V (+/-3%) threshold. Use with external precision voltage divider to monitor a higher voltage rail such as the PMIC input supply. PWR G15 VMON2_IR_VCPU Must be externally connected directly to VDD_CPU PWR D16 VMON3_IR_VEXT1P8 General purpose voltage monitor for external supplies, 1.8V threshold. With internal resistor Divider. PWR E17 VMON4_IR_VEXT1P8 General purpose voltage monitor for external supplies, 1.8V threshold. With internal resistor Divider. PWR F17 VMON5_IR_VEXT3P3 General purpose voltage monitor for external supplies, 3.3V threshold. With internal resistor Divider. PWR L14 6.3.25.4 EFUSE Table 6-104. EFUSE Signal Description SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] VPP_CORE (1) Programming voltage for MAIN Domain efuses PWR N17 VPP_MCU (1) Programming voltage for MCU Domain efuses PWR E11 (1) This signal is valid only for High-Security devices. For more details, see Section 7.7, VPP Specification for One-Time Programmable (OTP) eFUSEs. For General-Purpose devices do not connect any signal, test point, or board trace to this signal. 6.3.26 Power Supply Note All power balls must be supplied with the voltages specified in Section 7.3, Recommended Operating Conditions, unless otherwise specified in Section 6.3, Signal Descriptions. Table 6-105. Power Supply Signal Description SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] CAP_VDDS0 (1) External capacitor connection for MAIN domain GENERAL IO group 0 PWR M7 www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 79 Product Folder Links: DRA821U-Q1 |
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