LCR1210-R100F datasheet(11/59 Pages) SKYWORKS

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Si32260/1

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Figure 2. SPI Timing Diagram

Table 8. Switching Characteristics—SPI

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Cycle Time SCLK

—

Rise Time, SCLK

—

Fall Time, SCLK

—

Delay Time, SCLK Fall to SDO Active

td1

—

Delay Time, SCLK Fall to SDO

Transition

td2

—

Delay Time, CSB Rise to SDO Tristate

td3

—

Setup Time, CSB to SCLK Fall

tsu1

—

Hold Time, CSB to SCLK Rise

th1

—

Setup Time, SDI to SCLK Rise

tsu2

—

Hold Time, SDI to SCLK Rise

th2

—

Delay Time between Chip Selects

tcs

220

—

SDI to SDITHRU Propagation Delay

td4

—

Notes:

1. All timing is referenced to the 50% level of the waveform. Input test levels are VIH =VDDD –0.4 V, VIL =0.4 V.

2. Characteristics for outputs specified with CL = 20 pF.

SCLK

CSB

SDI

th1

td3

SDO

td1

td2

tsu1

tsu2

th2

tcs

SDITHRU

td4

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