CBB, CBC

www.vishay.com

Vishay Electro-Films

Revision: 08-Mar-2022

2

Document Number: 61042

For technical questions, contact: efi@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

CONFIGURATIONS in inches

SCHEMATIC

MECHANICAL SPECIFICATIONS

PARAMETER

VALUE

Chip Size,

CBB

0.019" x 0.048" ± 0.002" (0.48 mm x 1.2 mm ± 0.05 mm)

CBC

0.044" x 0.044" ± 0.002" (1.1 mm x 1.1 mm ± 0.05 mm)

Chip Thickness

0.010" ± 0.002" (0.254 mm ± 0.05 mm)

Chip Substrate Material

Semiconductor silicon

Dielectric

Silicon dioxide (MOS)

Bonding Pads

10 kÅ minimum aluminum (Au optional)

Backing

3 kÅ minimum gold

GLOBAL PART NUMBER INFORMATION

Global Part Number: CBB3100BLGKWS

Global Part Number Description: CBB 31 pF 25 % Au K WS

MODEL

SIZE

CAPACITANCE

(pF)

CAPACITANCE

MULTIPLIER

CODE

TOLERANCE

CODE

TERMINATION

VISUAL

CLASS

PACKAGING

CODE

CB

Binary

Capacitor

B = 19 x 48

C = 44 x 44

First 4 digits

are significant

figures of

capacitance

C = 0.001

B = 0.01

K = 10 %

M = 20 %

L = 25 %

G = Au

A = Al

H = class H

K = class K

WS = Waffle

pack, 100 min.,

1 mult.

0.009

0.040

0.020

0.018

0.0124

0.044

12 pF

24 pF

49 pF

CBC

0.005

0.009

0.029

0.018

3 pF

6 pF

0.008

0.048

0.004

0.0075

0.00375

0.004 0.004

0.015

0.019

0.016

1 pF 2 pF 4 pF

8 pF

16 pF

CBB

TOP BONDING PADS

3 pF

6 pF

12 pF 24 pF

Back of chip

48 pF

TOP BONDING PADS

1 pF

2 pF

4 pF

8 pF

Back of chip

16 pF

100

B

L

B

B

C

3

GK

WS