FT933Q-R datasheet(37/65 Pages) BRIDGETEK

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FT93x Datasheet Embedded Microcontroller Datasheet

Version 1.5

Document Reference No.: BRT_000051

Clearance No.: BRT#049

As the timer decrements, an interrupt occurs when the timer rolls over. Once started and initialized the

watchdog can’t be stopped. It can only be cleared by writing into a register.

The four user timers can be controlled from the main clock, each timer has its own 16-bit prescaler.

These timers can be started, stopped and cleared / initialized. The prescalers can be cleared/initialised

the same way.

The current value of all timers/prescalers can be read from a common register one-at-a-time

(multiplexed access).

All timers can count up/down and signal an interrupt when the timer rolls over. The timers can also be

configured to be one-shot or in continuous mode. They are initialised from a common register one-at-a-

time (multiplexed access).

If the user timer has already started using its prescaler it cannot be cleared and the command is ignored.

Each of the prescalers automatically stops after it is cleared individually. It also starts automatically when

the corresponding user timer starts using it.

4.14.1 Features



Four user timers with individual prescaler.



Supports 16-bit prescaler with system clock reference.



Supports individual timer interrupt generation.



Supports one-shot and continuous count for timer.



Supports 32-bit counter watchdog.



Supports watchdog interrupt generation.

4.15

PWM

The FT93x series supports 8 separate independent PWM output channels. All channels share an 8-bit

prescaler to scale the system clock frequency to the desired channels.

Each channel has its own 16-bit comparator value. This is the value that would be matched to a preset

16-bit counter. When a channel’s 16-bit comparator value matches that of the 16-bit counter, the

corresponding PWM channel output will toggle. This 16-bit comparator value will continue to count until it

reaches its preset value, and the counter will just roll over.

A special feature allows each of the 8 channels to toggle its own output based on the comparison results

of the other channels. Hence each channel potentially can have up to 8 toggle edges.

The PWM signal generated can be output as either multi-single-shot or continuous.

PWM channel 0 and channel 1 can double as a stereo 11 KHz or 22 KHz PWM audio channel.

Once this feature is setup, the 16-bit or 8-bit PCM audio data can be downloaded to the PWM local FIFO

which can hold up to 64 bytes stereo or 128 bytes mono audio data. The data will be played back based

on the pre-scaler and 16-bit counter. The data will be automatically scaled to fit in the playback period if

necessary.

The PWM FIFO can generate a number of interrupts for FIFO management. They are FIFO empty, full,

half-full, overflow, and underflow.

Each of these interrupts can be individually masked if required.

4.15.1 Features



Support 8 PWM output channels.



Support multi-single-shot or continuous PWM data output.



Support external GPIO trigger.



Support 16-bit / 8-bit stereo PWM audio data output.



Control PWM FIFO full, empty, half-empty, overflow and underflow buffer management.



Support PCM volume control for audio playback.

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