FT930Q-R datasheet(38/65 Pages) BRIDGETEK

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FT93x Datasheet Embedded Microcontroller Datasheet

Version 1.5

Document Reference No.: BRT_000051

Clearance No.: BRT#049

4.16

SD Host Controller

The FT93x series contains one SD Host controller offering access to external large capacity non-volatile

memory.

4.16.1 Features



Compliant with SD Host controller standard specification, version 3.0.



Supports both streaming and non-streaming data transfers.



Compliant with SD physical layer specification, version 3.0.



Supports configurable SD bus modes: 4-bit mode and 8-bit mode.



Compliant with SDIO card specification, version 2.0.



Support 4K SRAM for data FIFO.



Supports configurable 1-bit/4-bit SD card bus.



Configurable CPRM function for security.



Built-in generation and check for 7-bit and 16-bit CRC data.



Card detection (Insertion/Removal).



Supports read wait mechanism for SDIO function.



Supports suspend/resume mechanism for SDIO function.

4.17

Analog to Digital Converter (ADC)

The FT93x series has a low-power, high-speed, successive approximation Analog-to-Digital Converter

(ADC) that supports 8-bit resolution and maximum sampling frequency up to 460kSPS.

This ADC accepts analog inputs ranging from the ground supply to the power supply. This ADC can be

used in various low-power and medium-resolution applications.

4.17.1 Features



8-bit successive approximation ADC.



Three-channel analog input ADC1/2/3.



Individual channels can be selected for conversion.



Power-down mode support.



Maximum conversion rate of up to 460kSPS.



Measurement range 0 to VCC3V3A, by default the range voltage is 10% off of VCC3V3A. See

Table 5-7.



INL: +/-1LSB (max).



DNL: +/-1LSB (max).

4.18

Digital to Analog Converter (DAC)

The FT93x series has two 10-bit, 1 MSPS Digital-to-Analog converter (DAC). It includes digital logic for

registering the DAC value and a unity-gain buffer capable of driving off-chip. The module can also be

switched to a power-down state where it consumes a minimum amount of current.

4.18.1 Features



Two 10-bit DACs (DAC0/1).



10-bit R2R DAC ladder structure.



Buffered output.



Power-down mode support.



Programmable conversion rate, the maximum rate is 1MHz.



Selectable output drive.



INL: +/-1.5LSB (max).



DNL: +/-1LSB (max).

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