WM8785GEDSSLASHV datasheet(24/31 Pages) WOLFSON

Nome de Peças	WM8785GEDS/V

Descrição Electrónicos	24-Bit, 192kHz Stereo ADC

PDF	31 Pages

Scroll/Zoom	100%

Fabricante Electrônico	WOLFSON [Wolfson Microelectronics plc]

Página de início	http://www.wolfsonmicro.com

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24 / 31 page

WM8785

Pre-Production

PP Rev 3.0 December 2005

Figure 29 WM8785 in Time Division Multiplexing Left Justified Mode

Up to 4 devices (8 channels) can be supported, which would require 256 BCLKs per sample.

(whereas 128 BCLKs will allow only 2 devices, or 4 channels). The table below shows the range of

BCLK frequencies required.

BCLK RATE

DEVICES THAT CAN BE SUPPORTED

OVER-SAMPLE RATIOS

SUPPORTED (SET BY OSR)

64 fs

128 fs

192 fs

1, 2

Single/dual/quad rates all supported

256 fs

1, 2, 3, 4

Single rate only supported

Table 6 Range of BCLK Frequencies Required

Note: MCLK frequency must always be greater or equal to BCLK frequency

To avoid bus contention all chips on the TDM should be programmed before DOUT is released after

power up (DOUT is held at vss for 32 samples after power-up). Alternatively SDODIS should be set

while devices are programmed (to tri-state DOUT).

WM8785GEDS/V Folha de dados(PDF) 24 Page - Wolfson Microelectronics plc