STM32L010R8 datasheet(18/92 Pages) STMICROELECTRONICS

18 / 92 page

Functional overview

STM32L010K8 STM32L010R8

18/92

DS12325 Rev 3

3.4

Reset and supply management

3.4.1

Power supply schemes

•

VDD (1.8 to 3.6 V): external power supply for I/Os and the internal regulator. Provided

externally through VDD pins.

•

VSSA, VDDA (1.8 to 3.6 V): external analog power supplies for ADC, reset blocks, RCs

and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively.

3.4.2

Power supply supervisor

The STM32L010K8/R8 feature an integrated zeropower power-on reset (POR)/power-down

reset (PDR) that can be coupled with a brownout reset (BOR) circuitry.

After the VDD threshold is reached, the option byte loading process starts, either to confirm

or modify default thresholds, or to disable the BOR permanently.

The BOR is active at power-on, and ensures proper operation starting from 1.8 V, whatever

the power ramp-up phase before it reaches 1.8 V.

Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To

reduce the power consumption in Stop mode, it is possible to automatically switch off the

internal reference voltage (VREFINT) in Stop mode. The device remains in reset mode when

VDD is below a specified threshold, VPOR/PDR or VBOR, without the need for any external

reset circuit.

3.4.3

Voltage regulator

The regulator has three operation modes: main (MR), low power (LPR) and power down.

•

MR is used in Run mode (nominal regulation)

•

LPR is used in the Low-power run, Low-power sleep and Stop modes

•

Power down is used in Standby mode. The regulator output is high impedance, the

kernel circuitry is powered down, inducing zero consumption but the contents of the

registers and RAM are lost except for the standby circuitry (wakeup logic, IWDG, RTC,

LSI, LSE crystal 32 kHz oscillator, RCC_CSR).

3.4.4

Boot modes

At startup, BOOT0 pin and nBOOT0, nBOOT1 and nBOOT_SEL option bits are used to

select one of the three following boot options:

•

Boot from Flash memory

•

Boot from system memory

•

Boot from embedded RAM

The bootloader is located in system memory. It is used to reprogram the Flash memory by

using SPI1 (PA4, PA5, PA6 and PA7), I2C (PB6, PB7) or USART2 (PA2, PA3).

If the bootloader is activated (the bootloader is active on all empty devices due to the empty

check mechanism), then the above mentioned bits are configured depending on whether

SPI1, I2C or USART2 functionality is used.

See the application note STM32 microcontroller system memory boot mode (AN2606) for

more details.

STM32L010R8 Folha de dados(PDF) 18 Page - STMicroelectronics

STM32L010R8 Folha de dados(HTML) 18 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Folha de dados Download

Ligação URL