HVLED007 datasheet(20/33 Pages) STMICROELECTRONICS

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Application information

HVLED007

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DS12866 Rev 1

on the primary side. If the power demanded by the load requires a larger primary current this

results in a no longer regulated output voltage and in a gradual reduction of the power

throughput of the converter as the output voltage gets lower.

Figure 9. Effect of ripple on Ct on current sense signal: a) within linear dynamics,

close to clamp level; b) signal slightly exceeding clamp level; c) signal exceeding

clamp level, with OCP activation

The value of Ippk max is selected so as to ensure with adequate margin that the full load

power can be delivered to the output at the minimum specified input voltage, i.e. it is larger

than the value provided by equation #2 in Table 8 with Pin = Pin_max and Kv = Kv_min.

However, when determining the value of Rs, the effects of the ripple voltage across the

shaping capacitor Ct might need taking into account. In fact, as shown in the key waveforms

at switching frequency time scale in Figure 6, the turn-off of the power switch occurs on the

valleys of the ripple. So, the exact turn-off condition is:

Equation 12

VCt

VCt t,

VCt

VCT_OL

Vcsmax

VCt

Vcsref

VCt

VCt t,

VCt

VCT_OL

Vcsmax

Vcsref

VCt

VCt t,

VCt

Vcsref

VCt

VCt t,

VCt

VCT_OL

Vcsmax

Vcsref

VCt

VCt t,

VCt

Vcsref

Vcs T ON 

 



= Vcs

ref 

 Vcs

ref 

/2

–

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