TL431ACLP datasheet(24/83 Pages) TI

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10.2.1.2.2 Output Voltage and Logic Input Level

In order for TL431 to properly be used as a comparator, the logic output must be readable by the receiving logic

device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted

by VIH & VIL.

As seen in Figure 10-2, TL431's output low level voltage in open-loop/comparator mode is ~2 V, which is

typically sufficient for 5V supplied logic. However, would not work for 3.3 V & 1.8 V supplied logic. In order to

accomodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to

the receiving low voltage logic device.

TL431's output high voltage is equal to VSUP due to TL431 being open-collector. If VSUP is much higher than the

receiving logic's maximum input voltage tolerance, the output must be attenuated to accomadate the outgoing

logic's reliability.

When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 & R2 in Figure

10-1) is much greater than RSUP in order to not interfere with TL431's ability to pull close to VSUP when turning

off.

10.2.1.2.2.1 Input Resistance

TL431 requires an input resistance in this application in order to source the reference current (IREF) needed from

this device to be in the proper operating regions while turing on. The actual voltage seen at the ref pin will be

VREF=VIN-IREF*RIN. Since IREF can be as high as 4 µA it is recommended to use a resistance small enough that

will mitigate the error that IREF creates from VIN.

10.2.1.3 Application Curve

Time (s)

-0.001

-0.0006

-0.0002

0.0002

0.0006

0.001

-0.5

0.5

1.5

2.5

3.5

4.5

5.5

D001

Vin

Vka(Rsup=10k:)

Vka(Rsup=1k:)

Figure 10-2. Output Response With Various Cathode Currents

TL431, TL432

SLVS543Q – AUGUST 2004 – REVISED JULY 2022

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