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AM652X Folha de dados(PDF) 236 Page - Texas Instruments

Nome de Peças AM652X
Descrição Electrónicos  AM654x, AM652x Sitara™ Processors Silicon Revision 2.1
PDF  284 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
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AM652X Folha de dados(HTML) 236 Page - Texas Instruments

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7.9.5.21.4 PRU_ICSSG Universal Asynchronous Receiver Transmitter (PRU-ICSS UART)
7.9.5.21.4.1 PRU_ICSSG UART Electrical Data and Timing
Table 7-73 presents the PRU_ICSSG UART timing conditions.
Table 7-73. PRU_ICSSG UART Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
0.01
0.33
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
1
30
pF
7.9.5.21.4.1.1 PRU_ICSSG UART Timing Requirements
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
PRUR1H
tw(RXH)
Pulse Duration, Receive start, stop, data bit High
2+0.95*U
(1)
ns
PRUR1L
tw(RXL)
Pulse Duration, Receive start, stop, data bit Low
2+0.95*U
(1)
ns
(1)
U = UART baud time = 1/programmed baud rate.
7.9.5.21.4.1.2 PRU_ICSSG UART Switching Characteristics
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
f(baud)
Programmable baud rate
12
MHz
PRUR3L
tw(TXH)
Pulse Duration, Transmit start, stop, data bit High
-2+U(1)
ns
PRUR3H
tw(TXL)
Pulse Duration, Transmit start, stop, data bit Low
-2+U(1)
ns
(1)
U = UART baud time = 1/programmed baud rate.
PRUR3L
Start
Bit
Data Bits
PRG _UART0_TXD
i
SPRS91x_TIMING_PRU_UART_01
PRUR3H
PRUR1L
Data Bits
Bit
Start
PRG _UART0_RXD
i
PRUR1H
(1)
(1)
(1) i in PRG _UART0_RXD and PRG _UART0_TXD = 0, 1 or 2
i
i
Figure 7-108. PRU_ICSSG UART Timing
7.9.5.21.5 PRU_ICSSG Enhanced Capture Peripheral (PRU-ICSS ECAP)
7.9.5.21.5.1 PRU_ICSSG ECAP Electrical Data and Timing
Table 7-74 presents ECAP timing conditions.
Table 7-74. PRU_ICSSG ECAP Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
1
3
V/ns
OUTPUT CONDITIONS
AM6548, AM6528, AM6546, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
www.ti.com
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Product Folder Links: AM6548 AM6528 AM6546 AM6526



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