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DEVICE INFORMATION

13 14 15

DB0 (LSB)

DB1

DB2

DB3

DB4

DB5

DB6

DB7

DB8

DB9

DB10

DB11

36

35

34

33

32

31

30

29

28

27

26

25

16

1

2

3

4

5

6

7

8

9

10

11

12

DA13 (MSB)

DA12

DA11

DA10

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

17 18 19 20

47 46 45 44 43

48

42

40 39 38

41

21 22 23 24

37

Top View

48−Pin TQFP

PFB Package

DAC5672

SLAS440 – NOVEMBER 2004

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

AGND

38

I

Analog ground

AVDD

47

I

Analog supply voltage

BIASJ_A

44

O

Full-scale output current bias for DACA

BIASJ_B

41

O

Full-scale output current bias for DACB

CLKA/CLKIQ

18

I

Clock input for DACA, CLKIQ in interleaved mode

CLKB/RESETIQ

19

I

Clock input for DACB, RESETIQ in interleaved mode

DA[13:0]

1-14

I

Data port A. DA13 is MSB and DA0 is LSB.

DB[13:0]

23-36

I

Data port B. DB13 is MSB and DB0 is LSB.

DGND

15, 21

I

Digital ground

DVDD

16, 22

I

Digital supply voltage

EXTIO

43

I/O

Internal reference output (bypass with 0.1

µF to AGND) or external reference input

GSET

42

I

Gain-setting mode: H – 1 resistor, L – 2 resistors. Internal pullup.

IOUTA1

46

O

DACA current output. Full-scale with all bits of DA high.

IOUTA2

45

O

DACA complementary current output. Full-scale with all bits of DA low.

IOUTB1

39

O

DACB current output. Full-scale with all bits of DB high.

IOUTB2

40

O

DACB complementary current output. Full-scale with all bits of DB low.

MODE

48

I

Mode Select: H – Dual Bus, L – Interleaved. Internal pullup.

Sleep function control input: H – DAC in power-down mode, L – DAC in operating mode.

SLEEP

37

I

Internal pulldown.

WRTA/WRTIQ

17

I

Input write signal for PORT A (WRTIQ in interleaving mode)

WRTB/SELECTIQ

20

I

Input write signal for PORT B (SELECTIQ in interleaving mode)

3