ADCA5191ACPZ-R7 datasheet(21/24 Pages) AD

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Data Sheet

ADCA5191

APPLICATIONS INFORMATION

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Rev. 0 | 21 of 24

UPSTREAM APPLICATION CIRCUIT

The schematic in Figure 40 is recommended for upstream cable

system applications from 5 MHz to 700 MHz. Recommended val-

ues for all components are in the BOM listed in Table 11. T1 is

an RF transformer configured to transform the single-ended 75 Ω

RF input to a differential signal that drives the 37.5 Ω inputs of

the ADCA5191 (RFIN and RFIP). The voltage at Pin 1 of E2 is

the filtered supply voltage, VDD. This voltage is connected through

a series of components (R6, R4, and E1) and supplies the dc

reference at Pin 4 of T1. C6 stabilizes this reference and serves as

the ac ground for the RF input signal.

T2 is an RF transformer configured to transform the differential 37.5

Ω outputs (RFIN and RFIP) to a single-ended 75 Ω RF output.

The C2, C3, C5, C7, C8, C13, C14, C20, C21, L8, L9, L10, and

L11 components are intended for impedance matching, and these

components must be optimized to match the RF input source and

RF output load. Capacitor C4 blocks the dc voltage of the RF input

source. Capacitor C33 is for blocking the dc voltage from T2 to

RF_OUT. The VDD supply is connected through T2. The passive

networks connected to the BIASA and BIAS2A and the BIASB

and BIAS2B pins (Pin 11, Pin 14, Pin 27, and Pin 30) are also

part of the supply and biasing required for the ADCA5191 and

are discussed in additional detail in the Supply Voltage and Bias

Current section.

Figure 40. Suggested Upstream CATV Application Circuit

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