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STM32L072KZ Folha de dados(PDF) 24 Page - STMicroelectronics

Nome de Peças STM32L072KZ
Descrição Electrónicos  Ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, up to 192KB Flash, 20KB SRAM, 6KB EEPROM, USB, ADC, DACs
PDF  160 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L072KZ Folha de dados(HTML) 24 Page - STMicroelectronics

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Functional overview
STM32L072xx
24/160
DS10689 Rev 5
•
Startup clock
After reset, the microcontroller restarts by default with an internal 2.1 MHz clock (MSI).
The prescaler ratio and clock source can be changed by the application program as
soon as the code execution starts.
•
Clock security system (CSS)
This feature can be enabled by software. If an HSE clock failure occurs, the master
clock is automatically switched to HSI and a software interrupt is generated if enabled.
Another clock security system can be enabled, in case of failure of the LSE it provides
an interrupt or wakeup event which is generated if enabled.
•
Clock-out capability (MCO: microcontroller clock output)
It outputs one of the internal clocks for external use by the application.
Several prescalers allow the configuration of the AHB frequency, each APB (APB1 and
APB2) domains. The maximum frequency of the AHB and the APB domains is 32 MHz. See
Figure 2 for details on the clock tree.



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