STM32F730X8 datasheet(36/202 Pages) STMICROELECTRONICS

36 / 202 page

Functional overview

STM32F730x8

36/202

DS12536 Rev 2

All the RTC events (Alarm, WakeUp Timer, Timestamp or Tamper) can generate an interrupt

and wakeup the device from the low-power modes.

3.18

Low-power modes

The devices support three low-power modes to achieve the best compromise between low

power consumption, short startup time and available wakeup sources:

•

Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can

wake up the CPU when an interrupt/event occurs.

•

Stop mode

The Stop mode achieves the lowest power consumption while retaining the contents of

SRAM and registers. All clocks in the 1.2 V domain are stopped, the PLL, the HSI RC

and the HSE crystal oscillators are disabled.

The voltage regulator can be put either in main regulator mode (MR) or in low-power

mode (LPR). Both modes can be configured as follows (see Table 5: Voltage regulator

modes in stop mode):

–

Normal mode (default mode when MR or LPR is enabled)

–

Under-drive mode.

The device can be woken up from the Stop mode by any of the EXTI line (the EXTI line

source can be one of the 16 external lines, the PVD output, the RTC alarm / wakeup /

tamper / time stamp events, the USB OTG FS/HS wakeup and the LPTIM1

asynchronous interrupt).

•

Standby mode

The Standby mode is used to achieve the lowest power consumption. The internal

voltage regulator is switched off so that the entire 1.2 V domain is powered off. The

PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering

Standby mode, the SRAM and register contents are lost except for registers in the

backup domain and the backup SRAM when selected.

The device exits the Standby mode when an external reset (NRST pin), an IWDG reset,

a rising or falling edge on one of the 6 WKUP pins (PA0, PA2, PC1, PC13, PI8, PI11),

or an RTC alarm / wakeup / tamper /time stamp event occurs.

The Standby mode is not supported when the embedded voltage regulator is bypassed

and the 1.2 V domain is controlled by an external power.

Table 5. Voltage regulator modes in stop mode

Voltage regulator

configuration

Main regulator (MR)

Low-power regulator (LPR)

Normal mode

MR ON

LPR ON

Under-drive mode

MR in under-drive mode

LPR in under-drive mode

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