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ADP7185ACPZN3.3-R7 Folha de dados(PDF) 18 Page - Analog Devices |
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ADP7185ACPZN3.3-R7 Folha de dados(HTML) 18 Page - Analog Devices |
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18 / 19 page ![]() ADP7185 Data Sheet Rev. 0 | Page 18 of 19 PCB LAYOUT CONSIDERATIONS Place the input capacitor (CIN) as close as possible to the VIN and GND pins. Place the output capacitor (COUT) as close as possible to the VOUT and GND pins. Place bypass capacitors (CA and CREG) close to their respective pins (VA and VREG) and GND. Use of 0805 or 0603 size capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited. Connect the exposed pad to VIN. Figure 53. Evaluation Board Figure 54. Typical Board Layout, Top Side Figure 55. Typical Board Layout, Bottom Side |
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