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AM2732 Folha de dados(PDF) 41 Page - Texas Instruments |
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AM2732 Folha de dados(HTML) 41 Page - Texas Instruments |
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41 / 94 page  Table 6-3. Signal Descriptions (continued) FUNCTION BALL NUMBER SIGNAL NAME TYPE DEFAULT PULL STATUS BUFFER TYPE DESCRIPTION Radar Front-End V17 HW_SYNC_FE1 IO Pull Down Clocking Radar Front-End 1, Frame Sync Output Radar Front-End W17 HW_SYNC_FE2 IO Pull Down Clocking Radar Front-End 2, Frame Sync Output Radar Front-End C15 NERRORIN_FE1 IO Pull Down LVCMOS, Open-Drain Radar Front-End 1, Error Input Radar Front-End A16 NERRORIN_FE2 IO Pull Down LVCMOS, Open-Drain Radar Front-End 2, Error Input Radar Front-End B15 NRESET_FE1 IO Pull Down LVCMOS Radar Front-End 1, Power-on-Reset Output Radar Front-End A15 NRESET_FE2 IO Pull Down LVCMOS Radar Front-End 2, Power-on-Reset Output Radar Front-End B14 NWARMRESET_IN_FE1 IO Pull Down LVCMOS Radar Front-End 1, Warm-Reset Output Radar Front-End C13 NWARMRESET_IN_FE2 IO Pull Down LVCMOS Radar Front-End 2, Warm-Reset Output RCSS GPIO E19 RCSS_GPIO_49 IO Pull Down LVCMOS General-purpose I/O RCSS SPI A T18 RCSS_MIBSPIA_CLK IO Pull Up LVCMOS Radar Control SPI A, Clock Output RCSS SPI A T19 RCSS_MIBSPIA_CS0 IO Pull Up LVCMOS Radar Control SPI A, Chip-Select Output RCSS SPI A U18 RCSS_MIBSPIA_HOSTI RQ IO Pull Down LVCMOS Radar Control SPI A, Host Interrupt Input RCSS SPI A R17 RCSS_MIBSPIA_MISO IO Pull Up LVCMOS Radar Control SPI A, Master Input, Slave Output RCSS SPI A R18 RCSS_MIBSPIA_MOSI IO Pull Up LVCMOS Radar Control SPI A, Master Output, Slave Input RCSS SPI B V19 RCSS_MIBSPIB_CLK IO Pull Up LVCMOS Radar Control SPI B, Clock Output RCSS SPI B U17 RCSS_MIBSPIB_CS0 IO Pull Up LVCMOS Radar Control SPI B, Chip-Select Output RCSS SPI B W18 RCSS_MIBSPIB_HOSTI RQ IO Pull Down LVCMOS Radar Control SPI B, Host Interrupt Input RCSS SPI B V18 RCSS_MIBSPIB_MISO IO Pull Up LVCMOS Radar Control SPI B, Master Input, Slave Output RCSS SPI B U19 RCSS_MIBSPIB_MOSI IO Pull Up LVCMOS Radar Control SPI B, Master Output, Slave Input RCSS UART A A17 RCSS_UARTA_TX IO Pull Up LVCMOS Radar Control UART A, Transmitter RCSS UART A B16 RCSS_UARTA_RX IO Pull Up LVCMOS Radar Control UART A, Receiver Reset L2 NRESET I – LVCMOS, Open-Drain, Failsafe AM273x Power-on-Reset Input Reset K1 WARM_RESET IO Pull Disabled LVCMOS, Open-Drain AM273x Warm-Reset Input Reserved P4 Reserved1 – – – Reserved. Short to VSS on PCB. Reserved N3 Reserved2 – – – Reserved. Short to VSS on PCB. www.ti.com AM2732 SWRS245 – DECEMBER 2021 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: AM2732 |
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