SH7041A datasheet(737/923 Pages) RENESAS

Nome de Peças	SH7041A

Descrição Electrónicos	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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22.6.1

Boot Mode

When boot mode is used, the flash memory programming control program must be prepared in the

host beforehand. The SCI to be used is set to channel asynchronous mode.

When a reset start is executed after the LSI pins have been set to boot mode in the power-on reset

state, the boot program built into the LSI is started and the programming control program prepared

in the host is serially transmitted to the LSI via SCI channel 1. In the LSI, the programming

control program received via SCI channel 1 is written into the programming control program area

in on-chip RAM. After the transfer is completed, control branches to the start address of the

programming control program area and the programming control program execution state is

entered (flash memory programming is performed).

The transferred programming control program must therefore include coding that follows the

programming algorithm given later.

The system configuration in boot mode is shown in figure 22.8, and the boot mode execution

procedure in figure 22.9.

RXD1

TXD1

SCI1

Host

Write data reception

Verify data transmission

LSI

Flash memory

On-chip RAM

Figure 22.8 System Configuration in Boot Mode

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