D161DB70PI datasheet(25/57 Pages) AMD

25 / 57 page

May 26, 2004

Am29DL16xD

COMMAND DEFINITIONS

Writing specific address and data commands or se-

quences into the command register initiates device

operations. Table 14 defines the valid register com-

mand sequences.

Writing incorrect address and

data values or writing them in the improper se-

quence may place the device in an unknown state. A

reset command is then required to return the device to

reading array data.

All addresses are latched on the falling edge of WE#

or CE#, whichever happens later. All data is latched on

the rising edge of WE# or CE#, whichever happens

first. Refer to the AC Characteristics section for timing

diagrams.

Reading Array Data

The device is automatically set to reading array data

after device power-up. No commands are required to

retrieve data. Each bank is ready to read array data

after completing an Embedded Program or Embedded

Erase algorithm.

After the device accepts an Erase Suspend command,

the co rres ponding ban k enters the eras e-su s -

pend-read mode, after which the system can read

data from any non-erase-suspended sector within the

same bank. After completing a programming operation

in the Erase Suspend mode, the system may once

again read array data with the same exception. See

the Erase Suspend/Erase Resume Commands sec-

tion for more information.

The system

must issue the reset command to return a

bank to the read (or erase-suspend-read) mode if DQ5

goes high during an active program or erase opera-

tion, or if the bank is in the autoselect mode. See the

next section, Reset Command, for more information.

See also Requirements for Reading Array Data in the

Device Bus Operations section for more information.

The Read-Only Operations table provides the read pa-

rameters, and Figure 13 shows the timing diagram.

Reset Command

Writing the reset command resets the banks to the

read or erase-suspend-read mode. Address bits are

don’t cares for this command.

The reset command may be written between the se-

quence cycles in an erase command sequence before

erasing begins. This resets the bank to which the sys-

tem was writing to reading array data. Once erasure

begins, however, the device ignores reset commands

until the operation is complete.

The reset command may be written between the

sequence cycles in a program command sequence

before programming begins. This resets the bank to

which the system was writing to reading array data. If

the program command sequence is written to a bank

that is in the Erase Suspend mode, writing the reset

c o mma nd re t u r n s t hat b a n k t o t h e eras e - s u s -

pend-read mode. Once programming begins, however,

the device ignores reset commands until the operation

is complete.

The reset command may be written between the se-

quence cycles in an autoselect command sequence.

Once in the autoselect mode, the reset command

must be written to return to reading array data. If a

bank entered the autoselect mode while in the Erase

Suspend mode, writing the reset command returns

that bank to the erase-suspend-read mode.

If DQ5 goes high during a program or erase operation,

writing the reset command returns the banks to read-

ing array data (or erase-suspend-read mode if that

bank was in Erase Suspend).

Autoselect Command Sequence

The autoselect command sequence allows the host

system to access the manufacturer and device codes,

and determine whether or not a sector is protected.

Table 14 shows the address and data requirements.

This method is an alternative to that shown in Table 7,

which is intended for PROM programmers and re-

qu ire s V

ID o n a ddr es s pi n A 9 . T h e au tos e l e c t

command sequence may be written to an address

w i t h in a bank t h a t is eit her in t he read or

erase-suspend-read mode. The autoselect command

may not be written while the device is actively pro-

gramming or erasing in the other bank.

The autoselect command sequence is initiated by first

writing two unlock cycles. This is followed by a third

write cycle that contains the bank address and the au-

tos e lec t c o m m and . T he bank t hen ente r s the

autoselect mode. The system may read at any ad-

dress within the same bank any number of times

witho ut in itiat in g a no the r au tose le ct co mman d

sequence:

■ A read cycle at address (BA)XX00h (where BA is

the bank address) returns the manufacturer code.

■ A read cycle at address (BA)XX01h in word mode

(or (BA)XX02h in byte mode) returns the device

code.

■ A read cycle to an address containing a sector ad-

dress (SA) within the same bank, and the address

02h on A7–A0 in word mode (or the address 04h on

A6–A-1 in byte mode) returns 01h if the sector is

protected, or 00h if it is unprotected. (Refer to Ta-

bles 3–6 for valid sector addresses).

The system must write the reset command to return to

reading array data (or erase-suspend-read mode if the

bank was previously in Erase Suspend).

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