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PD70201 Folha de dados(PDF) 17 Page - Microchip Technology

Nome de Peças PD70201
Descrição Electrónicos  PoE IEEE짰 802.3af/at PD Controller
PDF  31 Pages
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

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Pin Number
PD70101 Pin
Name
PD70201 Pin Name Description
26
CSN
CSN
Negative Input of the Current Sense Amplifier. Kelvin
connect to the PGND side of the primary current sense
resistor.
27
CSP
CSP
Positive Input of the Current Sense Amplifier. Kelvin connect
to the Non-PGND side of the primary current sense resistor.
28
PG
PG
Primary Gate Driver. Connect to the gate of the primary side
Power MOSFET, directly or via a resistor.
29
VH
VH
5V High side ( VCC reference) internal LDO Output.
Connect a 0.1 µF or higher ceramic cap from VH to VCC.
30
VCC
VCC
Input Supply to the DC-DC Controller. Connect a 4.7 µF or
higher ceramic capacitor from this pin to PGND. Alternately,
a parallel combination of 1 µF ceramic and greater than 10
µF electrolytic capacitor can be used.
31
VAUX
VAUX
Auxiliary voltage reference to VPN_OUT; this voltage can be
used for DC-DC start up when operated with a bootstrapped
voltage source. For applications with POE power only
connect directly to VCC; for applications using multiple
power sources (such as a wall adapter), connect to VCC pin
through a small, low current, 30 V rated schottky diode.
32
VPP
VPP
This is the positive terminal of the POE input port. Connect
to the positive terminal of the input bridges at the CDET
positive side.
EP
Exposed Pad
Exposed Pad
Thermal Pad; electrically connected to VPN_IN. For proper
thermal management should be tied to a large copper fill or
plane that is electrically connected to VPN_IN.
PD70101 and PD70201
Pin Configuration
© 2020 Microchip Technology Inc.
Datasheet
DS00003738A-page 17



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