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Z8F082ASH020SC Folha de dados(PDF) 45 Page - Zilog, Inc. |
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Z8F082ASH020SC Folha de dados(HTML) 45 Page - Zilog, Inc. |
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45 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y Reset and STOP Mode Recovery Z8 Encore! XP® F08xA Series Product Specification 27 set to 1, the STOP Mode Recovery occurred because of a WDT time-out. If the STOP bit is 1 and the WDT bit is 0, the STOP Mode Recovery was not caused by a WDT time-out. This bit is reset by a Power-On Reset or a WDT time-out that occurred while not in STOP mode. Reading this register also resets this bit. WDT—Watch-Dog Timer Time-Out Indicator If this bit is set to 1, a WDT time-out occurred. A Power-On Reset resets this pin. A STOP Mode Recovery from a change in an input pin also resets this bit. Reading this register resets this bit. This read must occur before clearing the WDT interrupt. EXT—External Reset Indicator If this bit is set to 1, a Reset initiated by the external RESET pin occurred. A Power-On Reset or a STOP Mode Recovery from a change in an input pin resets this bit. Reading this register resets this bit. Reserved—Must be 0. |
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