ICS843021 datasheet(6/13 Pages) ICST

6 / 13 page

843021AG

www.icst.com/products/hiperclocks.html

REV. C MARCH 31, 2005

Integrated

Circuit

Systems, Inc.

ICS843021

FEMTOCLOCKS™CRYSTAL-TO-

3.3V LVPECL CLOCK GENERATOR

APPLICATION INFORMATION

Figure 2. CRYSTAL INPUt INTERFACE

CRYSTAL INPUT INTERFACE

The ICS843021 has been characterized with 18pF parallel

resonant crystals. The capacitor values, C1 and C2, shown in

Figure 2 below were determined using a 25MHz, 18pF parallel

resonant crystal and were chosen to minimize the ppm error.

The optimum C1 and C2 values can be slightly adjusted for

different board layouts.

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise.The ICS843021 provides sepa-

rate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

CC, and VCCA should

individually

connected

the

power

supply

plane through vias, and bypass capacitors should be

used for each pin. To achieve optimum jitter performance,

power supply isolation is required.

Figure 1 illustrates how

a 10

Ω resistor along with a 10μF and a .01μF bypass

capacitor should be connected to each V

CCA pin.

POWER SUPPLY FILTERING TECHNIQUES

FIGURE 1. POWER SUPPLY FILTERING

CCA

μF

.01

μF

3.3V

.01

μF

33p

18pF Parallel Crystal

27p

XTAL_OUT

XTAL_IN

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