ACE34AC04

4K I

VER 1.1

3

Block Diagram

Pin Description

(A)

Serial Clock (SCL)

The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of

this clock is to clock data out of the EEPROM device.

(B)

Device / Chip Select Addresses (A2, A1, A0)

These are the chip select input signals for the serial EEPROM devices. Typically, these signals are

(C)

Serial Data Line (SDA)

SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can

be wired-OR with other open-drain output devices.