L6911ETR datasheet(15/20 Pages) STMICROELECTRONICS

15 / 20 page

15/20

L6911E

Efficiency

The measured efficiency versus load current at different output voltages is shown in figure 11. In the application

two Mosfets STS12NF30L (30V, 8.5m

Ω typ with VGS=12V) connected in parallel are used for the High Side,

while three of them are used for the Low Side.

Figure 11. Efficiency vs. load current

Inductor design

Since the maximum output current is 28.5A, to have a 20% ripple (5A) the inductor chosen is 1.5

µH.

Output Capacitor

In the demo six OSCON capacitors, model 6SP680M, are used, with a maximum ESR equal to 12m

Ω each.

Therefore the resultant ESR is of 2m

Ω. For load transient of 28.5A in the worst case the voltage drop is of:

∆Vout = 28.5 * 0.002 = 57mV

The voltage drop due to the capacitor discharge during load transient, considering that the maximum duty cicle

is equal to 100% results in 46.5mV with 1.85V of programmed output.

Input Capacitor

For IOUT=28.5A and with D=0.5(worst case for input current ripple), Irms is equal to 17.8A. Three OSCON elec-

trolityc capacitors 6SP680M, with a maximum ESR equal to 12m

Ω, are chosen to substain the ripple. So the

losses in worst case are:

Over-Current Protection

Substituting the demo board parameters in the relationship reported in the relative section, (IOCSMIN=170µA;

IP=33A; RDSONMAX=3mΩ) it results that ROCS=1kΩ.

Output Current [A]

Vout = 1.825V

Vout = 1.225V

Vout = 1.500V

ESR I

rms

⋅

1.25 670

()m

(

L6911ETR Folha de dados(PDF) 15 Page - STMicroelectronics