LT8636 datasheet(16/32 Pages) AD

16 / 32 page

LT8636/LT8637

Rev. C

For more information www.analog.com

APPLICATIONS INFORMATION

Figure 1. Recommended PCB Layouts for the LT8636

Low EMI PCB Layout

The LT8636/LT8637 is specifically designed to minimize

EMI emissions and also to maximize efficiency when

switching at high frequencies. For optimal performance

the LT8636/LT8637 requires the use of multiple VIN

bypass capacitors.

Two small 1µF capacitors should be placed as close as

possible to the LT8636/LT8637, one capacitor on each

side of the device (CIN1, CIN2). A third capacitor with a

larger value, 2.2µF or higher, should be placed near CIN1

or CIN2.

See Figure 1 for recommended PCB layouts.

For more detail and PCB design files refer to the Demo

Board guide for the LT8636/LT8637.

Note that large, switched currents flow in the LT8636/

LT8637 VIN and GND pins and the input capacitors. The

loops formed by the input capacitors should be as small

as possible by placing the capacitors adjacent to the VIN

and GND pins. Capacitors with small case size such as

0603 are optimal due to lowest parasitic inductance.

The input capacitors, along with the inductor and out-

put capacitors, should be placed on the same side of the

circuit board, and their connections should be made on

that layer. Place a local, unbroken ground plane under the

application circuit on the layer closest to the surface layer.

The SW and BOOST nodes should be as small as possible.

Finally, keep the FB and RT nodes small so that the ground

traces will shield them from the SW and BOOST nodes.

OTHER SIGNAL VIAS

VOUT VIA

VIN VIA

GROUND VIA

8636 F01a

CVCC

CIN1

CIN2

COUT

CSS RT

CIN3

CBST

OTHER SIGNAL VIAS

VOUT VIA

VIN VIA

GROUND VIA

8636 F01b

CVCC

CIN1

CIN2

COUT

CSS RT

CIN3

CBST

(a) LT8636

(b) LT8637

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