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L6986H3V3 Folha de dados(PDF) 20 Page - STMicroelectronics |
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L6986H3V3 Folha de dados(HTML) 20 Page - STMicroelectronics |
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20 / 68 page  Figure 15. Normalized RDS(on),HS variation -2% -1% 0% 1% 2% 3% 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 VIN [V] RDS(on),HS @ I OUT =1A (normalized @ VIN =12V) 4.8 Light-load operation The MLF pinstrapping during the power-up phase determines the light-load operation (refer to Table 7. LNM/ LCM selection (L6986H3V3) and Table 8. LNM/ LCM selection (L6986H5V)). 4.8.1 Low noise mode (LNM) The low noise mode implements a forced PWM operation over the different loading conditions. The LNM features a constant switching frequency to minimize the noise in the final application and a constant voltage ripple at fixed VIN. The regulator in steady loading condition never skips pulses and it operates in continuous conduction mode (CCM) over the different loading conditions, thus making this operation mode ideal for noise sensitive applications. L6986H Light-load operation DS12905 - Rev 2 page 20/68 |
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