Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

AGLP030 Folha de dados(PDF) 64 Page - Actel Corporation

Nome de Peças AGLP030
Descrição Electrónicos  IGLOO PLUS Low Power Flash FPGAs with Flash*Freeze Technology
PDF  128 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  ACTEL [Actel Corporation]
Página de início  http://www.actel.com
Logo ACTEL - Actel Corporation

AGLP030 Folha de dados(HTML) 64 Page - Actel Corporation

Back Button AGLP030 Datasheet HTML 60Page - Actel Corporation AGLP030 Datasheet HTML 61Page - Actel Corporation AGLP030 Datasheet HTML 62Page - Actel Corporation AGLP030 Datasheet HTML 63Page - Actel Corporation AGLP030 Datasheet HTML 64Page - Actel Corporation AGLP030 Datasheet HTML 65Page - Actel Corporation AGLP030 Datasheet HTML 66Page - Actel Corporation AGLP030 Datasheet HTML 67Page - Actel Corporation AGLP030 Datasheet HTML 68Page - Actel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 64 / 128 page
background image
IGLOO PLUS DC and Switching Characteristics
2- 50
R e v i sio n 1 1
1.2 V DC Core Voltage
Table 2-79 • Output Enable Register Propagation Delays
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V
Parameter
Description
Std.
Units
tOECLKQ
Clock-to-Q of the Output Enable Register
1.06
ns
tOESUD
Data Setup Time for the Output Enable Register
0.52
ns
tOEHD
Data Hold Time for the Output Enable Register
0.00
ns
tOECLR2Q
Asynchronous Clear-to-Q of the Output Enable Register
1.25
ns
tOEPRE2Q
Asynchronous Preset-to-Q of the Output Enable Register
1.36
ns
tOEREMCLR
Asynchronous Clear Removal Time for the Output Enable Register
0.00
ns
tOERECCLR
Asynchronous Clear Recovery Time for the Output Enable Register
0.24
ns
tOEREMPRE
Asynchronous Preset Removal Time for the Output Enable Register
0.00
ns
tOERECPRE
Asynchronous Preset Recovery Time for the Output Enable Register
0.24
ns
tOEWCLR
Asynchronous Clear Minimum Pulse Width for the Output Enable Register
0.19
ns
tOEWPRE
Asynchronous Preset Minimum Pulse Width for the Output Enable Register
0.19
ns
tOECKMPWH
Clock Minimum Pulse Width High for the Output Enable Register
0.31
ns
tOECKMPWL
Clock Minimum Pulse Width Low for the Output Enable Register
0.28
ns
Note:
For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Folha de dados Download

Go To PDF Page


Ligação URL



ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   Link para a ficha técnica    |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com