HCS473-SLROM datasheet(33/68 Pages) MICROCHIP

33 / 68 page

 2002 Microchip Technology Inc.

Preliminary

DS40035C-page 31

HCS473

Table 7-5 timing values are compensated only for

HCS473 internal filter delays. The transponder reader

designer must compensate communication timing

accordingly for the cumulative antenna delays.

Use LF Demodulator mode to see the effects of the

internal filters and the LC antennae, Section 3.2.1.2.

It must be clearly understood that the HCS473 core

does not see the LF field immediately upon the base

station turning it on, nor does it immediately detect its

removal. If the internal analog delay and cumulative

antenna delays are greater than a given low time, the

HCS473 will obviously never “see” the low.

FIGURE 3-19:

LF ACK RESPONSE ADJUSTMENTS (LFRSP=1)

TAOACK

Command

CRC

Transport ACK

TTPACK

Inductive

(LC Pins)

RF Response

(DATA Pin)

TCMD

Present Transport Code Sequence

Inductive

(LC Pins)

Address

Command

CRC

TWRT

Write ACK

16-Bit

Write Data

RF Response

(DATA Pin)

TCMD

Write Sequence

Command

CRC

ACOL Off ACK

Inductive

(LC Pins)

RF Response

(DATA Pin)

TCMD

32-Bit

Transport

Anticollision Off Sequence

TFINH

Command

TCMD

Command

TCMD

Command

TCMD

5 LFTE

TCMD

Simultaneous

LF ACK

Simultaneous

LF ACK

Simultaneous

LF ACK

Transponder Select Sequence

Command

TID=0

12-Bit

VID

Transponder Select ACK

TID=1

TID=2

6 LFTE

TTSCMD

Command

TTSACK

Inductive

(LC Pins)

RF Response

(DATA Pin)

TCMD

Simultaneous

LF ACK

5 LFTE

HCS473-SLROM Folha de dados(PDF) 33 Page - Microchip Technology

HCS473-SLROM Folha de dados(HTML) 33 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Folha de dados Download

Ligação URL