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EM78P520N Folha de dados(PDF) 21 Page - ELAN Microelectronics Corp |
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EM78P520N Folha de dados(HTML) 21 Page - ELAN Microelectronics Corp |
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21 / 124 page ![]() EM78P520N 8-Bit Microprocessor with OTP ROM Product Specification (V1.4) 04.08.2016 13 (This specification is subject to change without prior notice) 6.2.5 R4 (RAM Select Register) Bit 7 (VDB): Voltage Detector. This is a read only bit. When VDD pin voltage is lower then Vdet (select by LVDS0~LVDS1) this bit will be cleared. 0 : low voltage is detected 1 : low voltage is not detected or LVD function is disabled Bit 6 (BNC): Bank Control Register 0 : allow to access only Bank 0 registers 1 : Allow to access all registers of any Bank Bits 5~0: are used to select up to 64 registers in the indirect addressing mode. See the the data memory configuration. User can use BANK instruction to change bank. 6.2.6 Bank 0 R5 (RAM Bank Select Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 0 0 BS2 BS1 BS0 Bits 7~3: Reserved Bits 2~0 (BS2~BS0): RAM Bank Select Register BS2 BS1 BS0 RAM Bank 0 0 0 Bank 0 0 0 1 Bank 1 : : : : : : : : 1 1 1 Bank 7 6.2.7 Bank 0 R7 (Port 7) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 R77 R76 R75 R74 R73 R72 R71 R70 Bits 7~0 (R77~R70): 8-bit I/O Registers of Port 7. 6.2.8 Bank 0 R8 (Port 8) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 R87 R86 R85 R84 R83 R82 R81 0 Bits 7~1 (R87~R81): 7-bit I/O Registers of Port 8. Bit 0: Reserved |
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