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ASM2P20807A Folha de dados(PDF) 7 Page - Alliance Semiconductor Corporation |
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ASM2P20807A Folha de dados(HTML) 7 Page - Alliance Semiconductor Corporation |
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7 / 11 page ![]() June 2005 ASM2P20807A rev 0.2 2.5V CMOS 1-TO-10 CLOCK DRIVER 7 of 11 Notice: The information in this document is subject to change without notice. Output Skew - tSK(O) Part-to-Part Skew - tSK(PP) NOTE: Device 1 and device 2 are same package type and speed grade. Test Conditions DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator. NOTES: 1. Test conditions at 100MHz. 2. Test conditions at 150MHz. Symbol VCC = 2.5V ±0.2V Unit 22 1 CL 12 2 pF RT Z OUT of pulse generator Ω 1.25 1 tR / tF 1.2 2 nS tPLH tPLHL 1 tSK(O) tPLH2 tPHL2 tSK(O) 2.5V 1.25V OV INPUT tSK(O) =[ tPLH2 – tPLH 1 ] or [tPHL2 - tPHL1 ] VOH 1.25 V VOL OUTPUT 1 VOH 1.25 V VOL OUTPUT 2 tSK(t) =[ tPLH2 – tPLH 1 ] or [tPHL2 - tPHL1 ] VOH 1.25 V VOL DEVICE 1 OUTPUT VOH 1.25 V VOL DEVICE 2 OUTPUT tPLH 1 tPLHL 1 tSK(t) tPLH2 tPHL2 tSK(t) 2.5V 1.25V OV INPUT DEVICE 2 OUTPUT |
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