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LPC55S6X Folha de dados(PDF) 65 Page - NXP Semiconductors |
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LPC55S6X Folha de dados(HTML) 65 Page - NXP Semiconductors |
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65 / 128 page ![]() LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved. Product data sheet Rev. 1.9 — 10 February 2020 65 of 128 NXP Semiconductors LPC55S6x 32-bit ARM Cortex-M33 microcontroller • Linearity and gain offset calibration logic. 7.30.2 Comparator The analog comparator can compare voltage levels on external pins and internal voltages. The comparator has five inputs multiplexed separately to its positive and negative inputs. 7.30.2.1 Features • Selectable external inputs can be used as either the positive or negative input of the comparator. • Voltage ladder source selectable between the supply, multiplexing between internal VBAT_PMU and ACMPVREF. • 32-stage voltage ladder can be used as either the positive or negative input of the comparator. • Supports standard and low power modes • Interrupt capability. Fig 7. Comparator block diagram + - CMP0 Interrupt logic 180813 ACMPVREF 5 0 5 0 31 0 VREF Internal reference PMUX NMUX HYST VDDA VREFINPUT 1 0 LOWPOWER Filtering FILTERGF_SAMPLEMODE FILTERGF_CLKDIV INT_ENABLE INT_CLEAR INT_CTRL STATUS INT_STATUS VAL ACMP0_A ACMP0_B ACMP0_C ACMP0_D ACMP0_E Interrupt to NVIC INT_SOURCE output to CTIMERs, SCTimer/PWM, ADC, DMA triggers FILTER BYPASS |
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