1

5

2

3

4

VREF

VIN

REF4132

C

OUT

EN

GND

N/C

C

IN

16

REF4132

SNAS794 – MAY 2020

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Product Folder Links: REF4132

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Copyright © 2020, Texas Instruments Incorporated

12 Layout

12.1 Layout Guidelines

Figure 21 illustrates an example of a PCB layout for a data acquisition system using the REF4132. Some key

considerations are:

•

•

Decouple other active devices in the system per the device specifications.

•

Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.

•

Place the external components as close to the device as possible. This configuration prevents parasitic errors

(such as the Seebeck effect) from occurring.

•

Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when absolutely necessary.

12.2 Layout Example

Figure 21. Layout Example