STM32MP151AAA3 datasheet(29/253 Pages) STMICROELECTRONICS

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DS12500 Rev 3

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STM32MP151A/D

Functional overview

3.8

Low-power strategy

There are several ways to reduce power consumption on STM32MP151A/D:

•

Decrease dynamic power consumption by slowing down the CPU clocks and/or the

bus matrix clocks and/or controlling individual peripheral clocks.

•

Save power consumption when the CPU is IDLE, by selecting among the available low-

power mode according to the user application needs. This allows the best compromise

between short startup time, low-power consumption, as well as available wakeup

sources, to be achieved.

The CPUs feature several low-power modes:

•

CSleep (CPU clock stopped)

•

CStop (CPU sub-system clock stopped)

•

Stop (bus matrix clocks stalled, the oscillators can be stopped)

•

CStandby (MPU sub-system clock stopped and wakeup via reset)

•

Standby (system powered down)

•

LP-Stop and LPLV-Stop (bus matrix clocks stalled, the oscillators can be stopped, low-

power mode signaled to external regulator)

CSleep and CStop low-power modes are entered by the CPU when executing the WFI (wait

for interrupt) or WFE (Wait for Event) instructions, or when the SLEEPONEXIT bit of the

Cortex-M4 core is set after returning from an interrupt service routine.

If part of the domain is not in low-power mode, the domain remains in the current mode.

Finally the system can enter Stop or Standby when all EXTI wakeup sources are cleared

and the CPUs are in CStop or CStandby mode.

Table 3. System versus domain power mode

System power mode

MPU

MCU

Run mode

CRun or CSleep

CStop or CStandby

CRun or CSleep

CStop

Stop mode

LP-Stop mode

LPLV-Stop mode

CStop or CStandby

CStop

Standby mode

CStandby or (CStop and

MPU PDDS = 1 and MPU CSTBYDIS = 1)

CStop and

MCU PDDS = 1

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