| Os motores de busca de Datasheet de Componentes eletrônicos |
|
TFP503PZP Folha de dados(PDF) 21 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TFP503PZP Folha de dados(HTML) 21 Page - Texas Instruments |
|
21 / 27 page ![]() TFP503 PanelBus HDCP DIGITAL RECEIVER SLDS149 − AUGUST 2004 21 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I2C interface (continued) Data A S Slave Address Sub Address A WSr A P From Transmitter From Receiver Sr Restart Condition A Acknowledge S Start Condition P Stop Condition A RA Slave Address Data A Not Acknowledge (SDA High) W Write R Read Figure 19. I2C Read Cycle Data S Slave Address R P From Transmitter From Receiver R Read A Acknowledge S Start Condition P Stop Condition A A Not Acknowledge (SDA High) A Data A Figure 20. HDCP Port Link Integrity Message Read The DDC_SDA and DDC_SCL I2C interface is 3.3-V tolerant and both DDC_SDA and DDC_SCL require a level shifter for connection to the external system 5-V DDC lines. The I2C SDA driver must provide the 0.4-V maximum low level at 3 mA specified by the I2C specification under typical conditions. Stressed conditions can make the output level marginal. The level shifter design must minimize loading and losses to provide the best possible low level signal on the SDA line. PowerPAD 100-terminal TQFP package The TFP503 is packaged in TI’s thermally enhanced PowerPAD 100-terminal TQFP packaging. The PowerPAD package is a 14-mm × 14-mm × 1-mm TQFP outline with 0.5-mm lead-pitch. The PowerPAD package has a specially designed die-mount pad that offers improved thermal capability over typical TQFP packages of the same outline. The TI 100-terminal TQFP PowerPAD package offers a backside solder plane that connects directly to the die-mount pad for enhanced thermal conduction. If traces or vias are located under the back side pad, they must be protected by a suitable solder mask or other assembly technique to prevent inadvertent shorting to the exposed backside pad. Soldering the backside of the device to a thermal land connected to the PCB ground plane is recommended for thermal, electrical, and EMI considerations. The thermal land may be soldered to the exposed PowerPAD using standard reflow soldering techniques. The recommended pad size for the grounded thermal land is 5.8 mm minimum, centered in the device land pattern. When vias are required to ground the land, multiple vias are recommended for a low-impedance connection to the ground plane. Multiple vias are also recommended when thermal flow from the land to another plane is needed. Vias in the exposed pad must be small enough or filled to prevent wicking the solder away from the interface between the package body and the thermal land on the surface of the board during solder reflow. |
|
Ligação URL |
| ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | Link para a ficha técnica | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |