High Speed CMOS Logic – 54HC08

Rev 1.0

07/02/19

 

Quad 2-Input AND Gate in bare die form

 

Description

Features:

 

 

 

 

 

The 54HC08 quad 2-input AND gate is fabricated on a

.35µm CMOS process combining high speed LSTTL

performance with CMOS low power. The device

consists of four independent 2-input AND gates with

standard push-pull outputs and performs the Boolean

compatible with standard CMOS outputs; with pull-up

resistors, they are compatible with LSTTL outputs. All

inputs are protected against ESD and excess voltage

transients. The die size is significantly smaller than

industry peers due to its re-design and production using

a more advanced CMOS process.

Output Drive Capability: 10 LSTTL Loads

Low Input Current: 1µA

Outputs directly interface CMOS, NMOS and TTL

Operating Voltage Range: 2V to 6V

Function compatible with 54LS08

High Noise Immunity CMOS process

Full Military Temperature Range.

 

 

Ordering Information

The following part suffixes apply:

Die Dimensions in µm (mils)

610 (24)

 

No suffix - MIL-STD-883 /2010B Visual Inspection

 

 

“H” - MIL-STD-883 /2010B Visual Inspection

+ MIL-PRF-38534 Class H LAT

 

“K” - MIL-STD-883 /2010A Visual Inspection (Space)

+ MIL-PRF-38534 Class K LAT

 

LAT = Lot Acceptance Test.

 

For further information on LAT process flows see below.

 

www.siliconsupplies.com\quality\bare-die-lot-qualification

 

 

Supply Formats:

Mechanical Specification

Default – Die in Waffle Pack (400 per tray capacity)

610 x 610

24 x 24

µm

mils

Die Size (Unsawn)

 

Sawn Wafer on Tape – On request

Minimum Bond Pad Size

85 x 85

3.35 x 3.35

µm

mils

Die Thickness

 

Unsawn Wafer – On request

350 (±20)

13.78 (±0.79)

µm

mils

 

Die Thickness <> 350µm(14 Mils) – On request

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

 

Assembled into Ceramic Package – On request

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