ICS84321 datasheet(11/18 Pages) ICST

11 / 18 page

84321AY

www.icst.com/products/hiperclocks.html

REV. B JUNE 9, 2005

Integrated

Circuit

Systems, Inc.

ICS84321

260MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL

LVPECL FREQUENCY SYNTHESIZER

The schematic of the ICS84321 layout example used in this lay-

out guideline is shown in

Figure 5A. The ICS84321 recommended

PCB board layout for this example is shown in

Figure 5B. This

layout example is used as a general guideline. The layout in the

LAYOUT GUIDELINE

FIGURE 5A. SCHEMATIC OF RECOMMENDED LAYOUT

actual system will depend on the selected component types, the

density of the components, the density of the traces, and the

stack up of the P.C. board.

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS84321 provides sepa-

rate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

CC, VCCA, and VCCO

should be individually connected to the power supply

plane through vias, and bypass capacitors should be

used for each pin. To achieve optimum jitter performance,

power supply isolation is required.

Figure 4 illustrates how

a 24

Ω resistor along with a 10μF and a .01μF bypass

capacitor should be connected to each V

CCA pin.

POWER SUPPLY FILTERING TECHNIQUES

FIGURE 4. POWER SUPPLY FILTERING

CCA

μF

.01

μF

3.3V

.01

μF

REF_IN

S_LOAD

VCCA

VCC

XTAL_SEL

Zo = 50 Ohm

S_DATA

125

Zo = 50 Ohm

S_CLOCK

C14

0.1u

VCC

ICS84321

VEE

S_CLOCK

S_DATA

S_LOAD

VCCA

nXTAL_SEL

T_CLK

X_OUT

C15

0.1u

C16

10u

125

C11

0.01u

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