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87C151SA Folha de dados(PDF) 13 Page - Intel Corporation |
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87C151SA Folha de dados(HTML) 13 Page - Intel Corporation |
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13 / 33 page ![]() 8XC151SASB HIGH-PERFORMANCE CHMOS MICROCONTROLLER DC CHARACTERISTICS Parameter values apply to all devices unless otherwise indicated Table 8 DC Characteristics at VCC e 45V b 55V Symbol Parameter Min Typical Max Units Test Conditions VIL Input Low Voltage b 05 02VCC b 01 V (except EA ) VIL1 Input Low Voltage 0 02VCC b 03 V (EA ) VIH Input High Voltage 02VCC a 09 VCC a 05 V (except XTAL1 RST) VIH1 Input High Voltage 07VCC VCC a 05 V (XTAL1 RST) VOL Output Low Voltage 03 V IOL e 100 mA (Port 1 2 3) 045 IOL e 16 mA 10 IOL e 35 mA (Note 1 Note 2) VOL1 Output Low Voltage 03 V IOL e 200 mA (Port 0 ALE PSEN ) 045 IOL e 32 mA 10 IOL e 70 mA (Note 1 Note 2) VOH Output High Voltage VCC b 03 V IOH eb10 mA (Port 1 2 3 ALE VCC b 07 IOH eb30 mA PSEN )VCC b 15 IOH eb60 mA (Note 3) NOTES 1 Under steady-state (non-transient) conditions IOL must be externally limited as follows Maximum IOL per port pin 10 mA Maximum IOL per 8-bit port port 0 26 mA ports 1 – 3 15 mA Maximum Total IOL for all output pins 71 mA If IOL exceeds the test conditions VOL may exceed the related specification Pins are not guaranteed to sink current greater than the listed test conditions 2 Capacitive loading on ports 0 and 2 may cause spurious noise pulses above 04V on the low-level outputs of ALE and ports 1 2 and 3 The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins change from high to low In applications where capacitive loading exceeds 100 pF the noise pulses on these signals may exceed 08V It may be desirable to qualify ALE or other signals with a Schmitt trigger or CMOS-level input logic 3 Capacitive loading on ports 0 and 2 causes the VOH on ALE and PSEN to drop below the specification when the address lines are stabilizing 4 Typical values are obtained using VCC e 50 TA e 25 C and are not guaranteed 13 |
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