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INMP521ACEZ-R0 Folha de dados(PDF) 5 Page - TDK Electronics |
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INMP521ACEZ-R0 Folha de dados(HTML) 5 Page - TDK Electronics |
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5 / 20 page ![]() INMP521 TABLE 2. TIMING CHARACTERISTICS TA = −40 to 85°C, VDD = 1.8 to 3.3 V, CLK = 2.4 MHz, CLOAD = 30 pF, unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical specifications are not guaranteed. PARAMETER CONDITIONS MIN TYP MAX UNITS NOTES SLEEP MODE Sleep Time Time from CLK falling (fCLK < 1 kHz) 1 ms 1 Wake-Up Time Time from CLK rising (fCLK > 1 kHz), power on 10 ms 1 INPUT tCLKIN Input clock period 326 800 ns Clock Frequency (CLK) 1.25 2.4 3.072 MHz 1 Clock Duty Cycle 40 60 % tRISE CLK rise time (10% to 90% level) 25 ns 2 tFALL CLK fall time (90% to 10% level) 25 ns 2 OUTPUT t1OUTEN DATA1 (right) driven after falling clock edge 40 ns t1OUTDIS DATA1 (right) disabled after rising clock edge 5 30 ns t2OUTEN DATA2 (left) driven after rising clock edge 40 ns t2OUTDIS DATA2 (left) disabled after falling clock edge 5 30 ns Note 1: The microphone operates at any clock frequency between 1.25 MHz and 3.072 MHz. Some specifications may not be guaranteed at frequencies other than 2.4 MHz. Note 2: Guaranteed by design. TIMING DIAGRAM Figure 1. Pulse Density Modulated Output Timing tCLKIN CLK DATA2 DATA1 t2OUTDIS t1OUTDIS t2OUTEN t1OUTEN tRISE tFALL Page 5 of 20 Document Number: DS-INMP521-00 Revision: 1.0. |
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