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CYUSB3610 Folha de dados(PDF) 28 Page - Cypress Semiconductor |
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CYUSB3610 Folha de dados(HTML) 28 Page - Cypress Semiconductor |
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28 / 35 page ![]() CYUSB3610 Document Number: 001-94768 Rev. *C Page 28 of 35 AC Timing Characteristics Notice that the following AC timing specifications for output pins are based on CL (Output load) equal to 50 pF. Clock Timing Reset Timing Table 19. Clock Timing Parameters Symbol Parameter Condition Min Typ Max Unit TP_XTALIN XTALIN clock cycle time – 40.0 – ns TH_XTALIN XTALIN clock high time – 20.0 – ns TL_XTALIN XTALIN clock low time – 20.0 – ns Table 20. Reset Timing Parameters Symbol Description Min Typ Max Unit Trst Reset pulse width after XTALIN is running 125 – 250000 XTALIN clock cycle [15] Trst XTALIN RESET# Note 15. If the system applications require using hardware reset pin, RESET#, to reset GX3 during device initialization or normal operation after VBUS pin is asserted, the above timing spec (Min = 5 μs, Max =10 ms) of RESET# should be met. |
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