LPC802 datasheet(21/83 Pages) NXP

21 / 83 page

LPC802

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Product data sheet

Rev. 1.6 — 27 April 2018

21 of 83

NXP Semiconductors

LPC802

32-bit ARM Cortex-M0+ microcontroller

9.13.1 Features

• Maximum data rates of up to 15 Mbit/s in master mode and up to 18 Mbit/s in slave

mode for SPI functions connected to all digital pins.

• Data frames of 1 to 16 bits supported directly. Larger frames supported by software.

• Master and slave operation.

• Data can be transmitted to a slave without the need to read incoming data, which can

be useful while setting up an SPI memory.

• Control information can optionally be written along with data, which allows very

versatile operation, including “any length” frames.

• One Slave Select input/output with selectable polarity and flexible usage.

Remark: Texas Instruments SSI and National Microwire modes are not supported.

9.14 I2C-bus interface (I2C0)

The I2C-bus is bidirectional for inter-IC control using only two wires: a serial clock line

(SCL) and a serial data line (SDA). Each device is recognized by a unique address and

can operate as either a receiver-only device (e.g., an LCD driver) or a transmitter with the

capability to both receive and send information (such as memory). Transmitters and/or

receivers can operate in either master or slave mode, depending on whether the chip has

to initiate a data transfer or is only addressed. The I2C is a multi-master bus and can be

controlled by more than one bus master.

9.14.1 Features

• I2C0 supports standard and fast mode with data rates of up to 400 kbit/s.

• Independent Master, Slave, and Monitor functions.

• Supports both Multi-master and Multi-master with Slave functions.

• Multiple I2C slave addresses supported in hardware.

• One slave address can be selectively qualified with a bit mask or an address range in

order to respond to multiple I2C bus addresses.

• 10-bit addressing supported with software assist.

• Supports SMBus.

9.15 CTimer

9.15.1 General-purpose 32-bit timers/external event counter

The LPC802 has one general-purpose 32-bit timer/counter.

The timer/counter is designed to count cycles of the system derived clock or an

externally-supplied clock. It can optionally generate interrupts or perform other actions at

specified timer values, based on four match registers. The timer/counter also includes

three capture inputs to trap the timer value when an input signal transitions, optionally

generating an interrupt.

9.15.1.1 Features

• A 32-bit timer/counter with a programmable 32-bit prescaler.

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