© PLX Technology, www.plxtech.com

Page 2 of 5

10/7/2010, Version 1.0

PEX 8732, PCI Express Gen 3 Switch, 32 Lanes, 8 Ports

Figure 2. Multi-Host Port Configur

4 x4s & 2 x2s

ations

2 x8s

4 x4s

3 x4s

4 x4s

8 x2s

x8 &

2 x2s

2x4s

& 6 x2s

PEX 8732

PEX 8732

PEX 8732

PEX 8732

CPU

Primary Host

End

Point

End

Point

End

Point

PEX 8732

NT

CPU

Secondary Host

Non-Transparent

Port

Figure 3. Non-Transparent Port

The PEX 8732 can also be configured in Multi-Host mode

s to

where users can choose up to six ports as host/upstream

ports and assign a desired number of downstream port

each host. In Multi-Host mode, a virtual switch is created

for each host port and its associated downstream ports

inside the device. The traffic between the ports of a virtual

witch is completely isolated from the traffic in other

a virtual switch inside the device.

lso provides several ways to configure its

evice can be configured through strapping

M. This

y

the

t

uring the

er Support

the PEX 8732 supports a Non-

which enables the

s

memory

nting

ubsystem

er

send interrupts

e

rt

host to its own domain. Figure 4a shows a two

ss

virtual switches. Figure 2 illustrates some configurations

of the PEX 8732 in Multi-Host mode where each ellipse

represents

The PEX 8732 a

registers. The d

pins, I

interface, host

software, or an

optional serial

EEPRO

allows for eas

debug during

developmen

phase,

performance

monitoring

virtual switches. Figure 2 illustrates some configurations

of the PEX 8732 in Multi-Host mode where each ellipse

represents

The PEX 8732 a

registers. The d

pins, I

interface, host

software, or an

optional serial

EEPRO

allows for eas

debug during

developmen

phase,

performance

monitoring

d

d

operation phase,

and driver or

software upgrade.

Dual-Host & Failov

In Single-Host mode,

Transparent (NT) Port,

Dual-Host & Failov

In Single-Host mode,

Transparent (NT) Port,

implementation of

implementation of

dual-host systems for

redundancy and host

dual-host systems for

redundancy and host

failover capability. The

failover capability. The

NT port allows system

to isolate host

domains by prese

the processor s

NT port allows system

to isolate host

domains by prese

the processor s

as an endpoint rath

than another

memory system.

Base address

registers are used

to translate

addresses; doorbell registers are used to

addresses; doorbell registers are used to

between the address domains; and scratchpad registers

(accessible by both CPUs) allow inter-processor

communication (see Figure 3).

Multi-Host & Failover Support

In Multi-Host mode, PEX 8732 can be configured with up

to six upstream host ports, each with its own dedicated

downstream ports. The device can be configured for 1+1

redundancy or N+1 redundancy. The PEX 8732 allows th

hosts to communicate their status to each other via special

door-bell registers. In failover mode, if a host fails, the

host designated for failover will disable the upstream po

attached to the failing host and program the downstream

ports of that

between the address domains; and scratchpad registers

(accessible by both CPUs) allow inter-processor

communication (see Figure 3).

Multi-Host & Failover Support

In Multi-Host mode, PEX 8732 can be configured with up

to six upstream host ports, each with its own dedicated

downstream ports. The device can be configured for 1+1

redundancy or N+1 redundancy. The PEX 8732 allows th

hosts to communicate their status to each other via special

door-bell registers. In failover mode, if a host fails, the

host designated for failover will disable the upstream po

attached to the failing host and program the downstream

ports of that

host system in Multi-Host mode with two virtual switches

inside the device and Figure 4b shows Host 1 disabled

after failure and Host 2 having taken over all of Host 1’s

end-points.

PEX 8732

PEX 8732

Figure 4a. Multi-Host

Host 1

Host 2

End

Point

End

Point

End

Point

End

Point

Figure 4b. Multi-Host Fail-Over

Host 1

End

Po

PEX 8732, PCI Express Gen 3 Switch, 32 Lanes, 8 Ports

© PLX Technology, www.plxtech.com

Page 2 of 5

10/7/2010, Version 1.0

Figure 2. Multi-Host Port Configur

4 x4s & 2 x2s

ations

2 x8s

4 x4s

3 x4s

4 x4s

8 x2s

x8 &

2 x2s

2x4s

& 6 x2s

PEX 8732

PEX 8732

PEX 8732

PEX 8732

CPU

Primary Host

End

Point

End

Point

End

Point

PEX 8732

NT

CPU

Secondary Host

Non-Transparent

Port

Figure 3. Non-Transparent Port

The PEX 8732 can also be configured in Multi-Host mode

s to

where users can choose up to six ports as host/upstream

ports and assign a desired number of downstream port

each host. In Multi-Host mode, a virtual switch is created

for each host port and its associated downstream ports

inside the device. The traffic between the ports of a virtual

witch is completely isolated from the traffic in other

a virtual switch inside the device.

lso provides several ways to configure its

evice can be configured through strapping

M. This

y

the

t

uring the

er Support

the PEX 8732 supports a Non-

which enables the

s

memory

nting

ubsystem

er

send interrupts

e

rt

host to its own domain. Figure 4a shows a two

host system in Multi-Host mode with two virtual switches

inside the device and Figure 4b shows Host 1 disabled

after failure and Host 2 having taken over all of Host 1’s

end-points.

operation phase,

and driver or

software upgrade.

as an endpoint rath

than another

memory system.

Base address

registers are used

to translate

PEX 8732

PEX 8732

Figure 4a. Multi-Host

Host 1

Host 2

End

Point

End

Point

End

Point

End

Point

Figure 4b. Multi-Host Fail-Over

Host 1

End

Point

End

Point

End

Point

E

Po

nd

int

Host 2

g down

ontroller can be used to manage the hot-plug event of its

pped

ion

low optimization of power and signal strength in a

the SerDes block supports loop-back

.

Hot Plug for High Availability

Hot plug capability allows users to replace hardware

modules and perform maintenance without powerin

the system. The PEX 8732 hot plug capability feature

makes it suitable for High Availability (HA)

applications. Three downstream ports include a Standard

Hot Plug Controller. If the PEX 8732 is used in an

application where one or more of its downstream ports

connect to PCI Express slots, each port’s Hot Plug

C

associated slot. Every port on the PEX 8732 is equi

with a hot-plug control/status register to support hot-plug

capability through external logic via the I

SerDes Power and Signal Management

The PEX 8732 provides low power capability that is fully

compliant with the PCIe power management specificat

and supports software control of the SerDes outputs to

al

system. Furthermore,

modes and advanced reporting of error conditions,

which enables efficient management of the entire system

Interoperability

The PEX 8732 is designed to be fully compliant with the

PCI Express Base Specification r2.0, and is backwards

compatible to PCI Express Base Specification r1.1 and