FARM™

Rev 6.9

vicorpower.com

Page 5 of 11

06/2017

800 927.9474

FARMxxxx

Application Note

The Filtered, Autoranging Rectifier Module (FARM) provides an

effective solution for the AC frontend of a power supply built

with Vicor DC-DC converters. This high-performance power

system building block satisfies a broad spectrum of requirements

and agency standards.

In addition to providing transient/surge immunity and EMI

filtering, the FARM contains all of the power switching and

control circuitry necessary for autoranging rectification, inrush

current limiting, and overvoltage protection. This module also

provides converter enable and status functions for orderly power

up/down control or sequencing. To complete the AC front-end

configuration, the user only needs to add hold-up capacitors, and

a few discrete components.

Functional Description

Initial Conditions: The switch that bypasses the inrush

limiting PTC (positive temperature coefficient) thermistor is

open when power is applied, as is the switch that engages

the strap for voltage doubling. (See Figure 7). In addition, the

converter modules are disabled via the Enable (EN) line, and

BusOK (BOK) is high.

Power Up Sequence (See Figure 8):

1.1. Upon application of input power, the output bus capacitors

begin to charge. The thermistor limits the charge current, and

the exponential time constant is determined by the hold-up

capacitor value and the thermistor cold resistance. The slope

(dV/dt) of the capacitor voltage versus time approaches zero

as the capacitors become charged to the peak of the

AC line voltage.

2.1. If the bus voltage is greater than 200V, the doubler is

not activated.

3.1. If the bus voltage is greater than 235V as the slope

approaches zero, the inrush limiting thermistor is bypassed.

Below 235V, it is not bypassed.

4.1. The converters are enabled ~150 milliseconds

after the thermistor bypass switch is closed.

5.1. Bus-OK is asserted after an additional ~150 millisecond delay

to allow the converter outputs to settle within specification.

Power Down Sequence: (See Figure 8). When input power

is turned off or fails, the following sequence occurs as the bus

voltage decays:

1.2. Bus-OK is de-asserted when the bus voltage falls below

2.2. The converters are disabled when the bus voltage

are disabled, the entire power-up sequence is repeated.

If a momentary power interruption occurs and power is

re-established before the bus reaches the disable threshold,

the power up sequence is not repeated, i.e., the power

conversion system “rides through” the

momentary interruption.

Microcontroller

N

L

PTC

Thermistor

+OUT

–OUT

Strap

EN

BOK

Strap

EMI

Filter

EMI GRD

400

300

200

100

0

90 – 132V

AC Line

Output

Bus

Strap

PTC

Thermistor

Bypass

Converter

Enable

Bus OK

~150ms

Power

Up

Power

Down

Timing Diagram, Power Up/Down Sequence

4.1

1.1

2.1

3.1

5.1

2.2

1.2

~150ms

Figure 7 — Functional block diagram: autoranging rectifier

Figure 8 — Timing diagram: power up/down sequence