CXD3422GA datasheet(6/54 Pages) SONY

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CXD3422GA

No.

Symbol

TEST2

V4 (V2)

V3A (V1A)

VSS1

SSGSL

VDD1

SCK1

V2 (NC)

V5B (V3B)

SUB

RST

WEN/FLD

SEN1

VSS5

V5A (V3A)

V1 (NC)

V3B (V1B)

V6 (V4)

SNCSL

ID/EXP

I/O

—

I/O

—

I/O

—

Description

Timing generator block test input 2.

Normally fix to GND. (With pull-down resistor)

CCD vertical register clock output. The symbol in parenthesis is for ICX434 mode.

Timing generator block 15.0V power supply. (Power supply for vertical driver)

CCD vertical register clock output. The symbol in parenthesis is for ICX434 mode.

Timing generator block digital GND.

Internal SSG enable.

High: Internal SSG valid, Low: External sync valid (With pull-down resistor)

Timing generator block digital power supply. (Power supply for common logic block)

Timing generator block serial interface clock input.

Schmitt trigger input.

Vertical sync signal input/output.

Timing generator block GND. (GND for vertical driver)

CCD vertical register clock output. The symbol in parenthesis is for ICX434 mode.

Timing generator block –7.5V power supply. (Power supply for vertical driver)

CCD electric shutter pulse.

Timing generator block reset input.

High: Normal operation, Low: Reset control

Normally apply reset during power-on.

Schmitt trigger input.

Memory write timing pulse output/field discrimination pulse output.

Switching possible using the serial interface data. (Default: WEN output)

Timing generator block serial interface strobe input.

Schmitt trigger input.

Horizontal sync signal input/output.

Timing generator block digital GND.

CCD vertical register clock output. The symbol in parenthesis is for ICX434 mode.

Control input used to switch sync system.

High: CKI sync, Low: MCKO sync (With pull-down resistor)

Vertical direction line identification pulse output/Exposure time idenfication pulse

output.

Switching possible using the serial interface data. (Default: ID output)

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