ADA4625-1ARDZ-R7 datasheet(22/30 Pages) AD

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ADA4625-1

Data Sheet

Rev. 0 | Page 22 of 30

APPLICATIONS INFORMATION

ACTIVE LOOP FILTER FOR PHASE-LOCKED LOOPS

(PLLS)

PLL Basic

A PLL is a feedback system that combines a phase detector

(PD), a loop filter, and a voltage controlled oscillator (VCO)

that is so connected that the oscillator maintains a constant

frequency (or phase angle) relative to the reference signal. The

functional block diagram of a basic PLL is shown in Figure 71.

PHASE

DETECTOR

CHARGE

PUMP

N DIVIDER

LOOP

FILTER

VCO

fREF

fOUT

Figure 71. Basic PLL

The phase detector detects the phase difference between the

input reference signal and the feedback signal. The resulting

error signal is proportional to the relative phase of the input

and the feedback signals. The charge pump converts the PD

error signal into current pulses. A loop filter circuit is typically

required to integrate and smooth the source and sink current

pulses from the charge pump into a voltage, which in turn,

drives the VCO. The VCO outputs a range of frequencies

depending on the voltage level at its tuning port. By making

the frequency N divider programmable, the VCO frequency

can be tuned in either integer steps or fractional amounts

characterizing the PLL as either an integer-N PLL or a

fractional-N PLL. Because a PLL is a negative feedback loop,

the output of the VCO adjusts as necessary until the frequency

error signal is zero and the PLL is in lock. The output frequency

is given by fOUT = N × fREF.

Figure 72 shows the block diagram of the basic PLL model in

the Laplace transform format, where fREF is the frequency of the

input signal, and fOUT is the frequency of the VCO output signal.

Because the phase difference is the integral of the frequency

difference, there is a 1/s term in the PLL loop.

PHASE

DETECTOR

–

CHARGE

PUMP

LOOP

FILTER

N DIVIDER

VCO

fREF

fOUT

Z(s)

Figure 72. Basic PLL Model

Loop Filter

The loop filter, which smooths out the error signal, is a critical

part of the system. For applications that require low phase noise

and a wide tuning range, design the VCO with a low gain and a

large input voltage range to satisfy these requirements. When the

required VCO tuning voltage is higher than the maximum

voltage the charge pump can supply, implement an active loop

filter comprising of an op amp with gain to accommodate the

higher tuning voltages. Figure 73 and Figure 74 illustrate the typical

active loop filters in inverting and noninverting topologies,

respectively, with prefiltering.

CHARGE

PUMP

OUTPUT

VCO

INPUT

Figure 73. Typical Active Loop Filter—Inverting Topology

CHARGE

PUMP

OUTPUT

VCO

INPUT

Figure 74. Typical Active Loop Filter—Noninverting Topology

The inverting topology has the advantage of biasing the charge

pump output at a fixed voltage, typically one-half the charge

pump voltage (VP/2), which is optimal for spur performance.

When using the inverting topology, ensure that the PLL IC

allows the phase detector polarity to be inverted for the correct

polarity voltage at the output of the op amp for driving the VCO.

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