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BT8376EPF Folha de dados(PDF) 72 Page - Synaptics Incorporated. |
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BT8376EPF Folha de dados(HTML) 72 Page - Synaptics Incorporated. |
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72 / 323 page ![]() 2.0 Circuit Description Bt8370/8375/8376 2.6 Clock Rate Adapter Fully Integrated T1/E1 Framer and Line Interface 2-44 Conexant N8370DSE Step 4 Configure RSCALE, VSCALE, VSEL, and XSEL from Table 2-9 which contains configuration examples. Again, in some cases, two or more configurations are possible for each frequency option. Many other RSCALE and VSCALE values are also applicable. RSCALE is a programmable frequency divider which scales the CLADI clock frequency before it is applied to the CLAD phase detector, CPHASE. Similarly, VSCALE scales the CLAD internal feedback clock, CLADV. These two clocks must have the same frequency at the phase detector’s input for the CLAD loop to properly lock. The rule is (CLADI Reference freq) ÷ (RSCALE factor) = (CLADV freq) ÷ (VSCALE factor). Table 2-9. Common CLADI Reference Frequencies and CLAD Configuration Examples (1 of 2) CLADI Reference (kHz) RSCALE Phase Compare Frequency (kHz) VSCALE CLADV (kHz) T1/E1 VSEL XSEL 8 0 8 7 1024 X 0 X 16 0 16 6 1024 X 0 X 32 0 32 5 1024 X 0 X 64 0 64 4 1024 X 0 X 128 0 128 3 1024 X 0 X 256 0 256 2 1024 X 0 X 512 0 512 1 1024 X 0 X 1024 0 1024 0 1024 X 0 X 2048 0 2048 0 2048 X 1 X 7 16 7 2048 X 1 X 0 2048 0 2048 0 7 0 4096 0 4096 0 4096 X 2 X 7 32 7 4096 X 2 X 1 2048 1 4096 0 7 1 8192 0 8192 0 8192 X 3 X 7 64 7 8192 X 3 X 2 2048 2 8192 0 7 2 16384 0 16384 0 16384 X 8 X 7 128 8 1024 X 0 X 0 16384 0 16384 0 7 3 1536 2 384 2 1536 X 6 X 1544 2 386 2 1544 X 5 X 2 386 2 1544 1 7 0 |
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