M95160-RBN3T datasheet(16/40 Pages) STMICROELECTRONICS

Nome de Peças	M95160-RBN3T

Descrição Electrónicos	16Kbit and 8Kbit Serial SPI Bus EEPROM With High Speed Clock

PDF	40 Pages

Scroll/Zoom	100%

Fabricante Electrônico	STMICROELECTRONICS [STMicroelectronics]

Página de início	http://www.st.com

Logo

16 / 40 page

M95160, M95080

16/40

(BP1, BP0) bits of the Status Register, are

also hardware protected against data

modification.

Regardless of the order of the two events, the

Hardware Protected Mode (HPM) can be entered:

–

by setting the Status Register Write Disable

(SRWD) bit after driving Write Protect (W) Low

–

or by driving Write Protect (W) Low after

setting the Status Register Write Disable

(SRWD) bit.

The only way to exit the Hardware Protected Mode

(HPM) once entered is to pull Write Protect (W)

High.

If Write Protect (W) is permanently tied High, the

Hardware Protected Mode (HPM) can never be

activated, and only the Software Protected Mode

(SPM), using the Block Protect (BP1, BP0) bits of

the Status Register, can be used.

Table 7. Address Range Bits

Note: b15 to b11 are Don’t Care on the M95160.

b15 to b10 are Don’t Care on the M95080.

Figure 10. Write Status Register (WRSR) Sequence

Device

M95160

M95080

Address Bits

A10-A0

A9-A0

AI02282D

3456789 10 11 12 13 14 15

High Impedance

Instruction

Status

765432

MSB

M95160-RBN3T Folha de dados(PDF) 16 Page - STMicroelectronics