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Issue A

φR,φV

Phase Detector B Outputs (Pins 8, 9)

These phase detector outputs can be combined externally for

a loop–error signal. A single–ended output is also available for

this purpose (see PDout).

If frequency fV is greater than fR or if the phase of fV is

leading, then error information is provided by φV pulsing low.

φR remains essentially high.

If the frequency fV is less than fR or if the phase of fV is

lagging, then error information is provided by φR pulsing low.

φV remains essentially high.

If the frequency of fV = fR and both are in phase, then both

φV and φR remain high except for a small minimum time peri-

od when both pulse low in phase.

fV

N Counter Output (Pin 10)

This is the buffered output of the ÷ N counter that is inter-

nally connected to the phase detector input. With this output

available, the ÷ N counter can be used independently.

LD

Lock Detector Output (Pin 28)

Essentially a high level when loop is locked (fR, fV of same

phase and frequency). Pulses low when loop is out of lock.

POWER SUPPLY

VDD

Positive Power Supply (Pin 3)

The positive power supply potential. This pin may range

from + 3 to + 9 V with respect to VSS.

VSS

Negative Power Supply (Pin 2)

The most negative supply potential. This pin is usually-

ground.

LANSDALE Semiconductor, Inc.

ML145151

TYPICAL APPLICATIONS

Figure 1. 5 MHz to 5.5 MHz Local Oscillator Channel Spacing = 1 kHz

0 1 1 1 0 0 0 1 0 0 0 = 5 MHz

1 0 1 0 1 1 1 1 1 0 0 = 5.5 MHz

5 – 5.5 MHz

VOLTAGE

CONTROLLED

OSCILLATOR

NC

NC

PDout

RA0

RA1

RA2

N13

N0

N1

N2

N3

N4

N5

N6

N7

N8

N9

N10

N11

N12

ML145151

fin

OSCout

OSCin

2.048 MHz

Figure 2. Synthesizer for Land Mobile Radio UHF Bands

NOTES:

1. fR = 4.1667 kHz; ÷ R = 2410; 21.4 MHz low side injection during receive.

2. Frequency values shown are for the 440 – 470 MHz band. Similar implementation applies to the 406 – 440 MHz band.

For 470 – 512 MHz, consider reference oscillator frequency X9 for mixer injection signal (90.3750 MHz).

60.2500 MHz

“0”

“1”

“1”

CHOICE OF

DETECTOR

ERROR

SIGNALS

LOCK DETECT SIGNAL

T: 13.0833 – 18.0833 MHz

R: 9.5167 – 14.5167 MHz

T: 73.3333 – 78.3333 MHz

R: 69.7667 – 74.7667 MHz

X6

VCO

LOOP

FILTER

DOWN

MIXER

X6

T/R

VSS

VDD

CHANNEL PROGRAMMING

÷ N = 2284 TO 3484

TRANSMIT

(ADDS 856 TO

÷ N VALUE)

RECEIVE

REF. OSC.

10.0417 MHz

(ON–CHIP OSC.

OPTIONAL)

“1”

“0”

“0”

fV

LD

RA0

RA1

RA2

OSCin

OSCout

ML145151

+ V

TRANSMIT: 440.0 – 470.0 MHz

RECEIVE: 418.6 – 448.6 MHz

(25 kHz STEPS)

PDout

φR

fV

fin

ML145151 Data Sheet Continued on Page 23