ST25DV64K datasheet(66/220 Pages) STMICROELECTRONICS

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ST25DVxxx specific features

ST25DV04K ST25DV16K ST25DV64K

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DocID027603 Rev 4

I2C transaction is terminated:

•

at the end of EEPROM programming time after the stop condition of a successful write

into EEPROM (user memory or system configuration). See Section 6.4: I2C Write

operations for write time calculation.

•

at stop condition for any other I2C transaction

•

at VCC power off

•

at any I2C error (terminated before stop condition)

•

at I2C timeout if it occurs

When RF is busy, I2C interface answers by NoAck on any I2C command.

When I2C is busy, RF commands receive no response (Inventory, Stay quiet, addressed

commands) or error code 0Fh for any other command.

5.6

Data Protection

ST25DVxxx provides a special data protection mechanism based on passwords that unlock

security sessions.

User memory can be protected for read and/or write access and system configuration can

be protected from write access, both from RF and I2C assess.

5.6.1

Data protection registers

Table 28. RFA1SS(1)

Command

Read Configuration (cmd code A0h) @04h

Write Configuration (cmd code A1h) @04h

Type

R always, W if RF configuration security session is open and

configuration not locked

I2C

Address

E2 = 1, 0004h

Type

R always, W if I2C security session is open

Bit

Name

Function

Factory

Value

b1-b0

PWD_CTRL_A1

00: Area 1 RF user security session can’t be open by password

01: Area 1 RF user security session is open by RF_PWD_1

10: Area 1 RF user security session is open by RF_PWD_2

11: Area 1 RF user security session is open by RF_PWD_3

00b

b3-b2

RW_PROTECTION_A1

00: Area 1 RF access: Read always allowed / Write always allowed

01: Area 1 RF access: Read always allowed, Write allowed if RF user

security session is open

10: Area 1 RF access: Read always allowed, Write allowed if RF user

security session is open

11: Area 1 RF access: Read always allowed, Write always forbidden

00b

b7-b4

RFU

0000b

1. Refer to Table 8: System configuration memory map for the RFA1SS register.

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