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LPV821

SNOSD36A – AUGUST 2017 – REVISED DECEMBER 2017

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Typical Applications (continued)

9.2.1.2 Detailed Design Procedure

Referring to Figure 40, the load current passing though the shunt resistor (Rshunt) develops the shunt voltage,

Vshunt across the resistor. The shunt voltage is then amplified by the LPV821 by the ratio of R4 by R3 . The gain

of the difference amplifier is set by the ratio of R4 to R3 . To minimize errors, set R2 = R4 and R1 = R3 . The

bias voltage is supplied by buffering a resistor divider using a second LPV821 nanopower op amp. The circuit

equations are provided below.

(2)

(3)

(4)

(5)

(6)

(7)

The tolerance of the shunt resistor, the ratio of R4 to R3 and the ratio of R2 to R1 are the main sources of gain

error in the signal path. To optimize the cost, a shut resistor with a tolerance of 0.5% was chosen. The main

sources of offset errors in the circuit are the voltage divider network comprise of R5, R6 and how closely the ratio

of R4 / R3 matches the ration of R2 / R1. The latter value affects the CMRR of the difference amplifier, ultimately

translating to an offset error.

The shunt voltage is scaled down by a divider network made of R1 and R2 before reaching the LPV821 amplifier

stage. The voltage present at the non-inverting node of the LPV821 should not exceed the common-mode range

of the device. The extremely low offset voltage and drift of the LPV821 ensures minimized offset error in the

measurement.

In case a bi-direction current sensing is required, for symmetric load current of –1 A to 1 A, the voltage divider

resistors R5 and R6 must be equal. To minimize power consumption, 100-kΩ resistors with a tolerance of 0.5%

were selected.

To set the gain of the difference amplifier, the common-mode range and output swing of the LPV821 must be

considered. The gain of the difference amplifier can now be calculated as shown below

(8)

10 Power Supply Recommendations

The LPV821 is specified for operation from 1.7 V to 3.6 (±0.85 V to ±1.8 V); many specifications apply from

–40°C to 125°C. The Typical Characteristics presents parameters that can exhibit significant variance with regard

to operating voltage or temperature.

CAUTION

Supply voltages larger than 4 V can permanently damage the device (see the Absolute

Maximum Ratings).

TI recommends placing 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in

from noisy or high-impedance power supplies. For more detailed information on bypass capacitor placement,

refer to the Layout section.