2

8393CS-MCU Wireless-09/14

ATmega256/128/64RFR2

1 Pin Configurations

Figure 1-1. Pinout ATmega256/128/64RFR2

Note:

The large center pad underneath the QFN/MLF package is made of metal and internally connected

to AVSS. It should be soldered or glued to the board to ensure good mechanical stability. If the

center pad is left unconnected, the package might loosen from the board. It is not recommended to

use the exposed paddle as a replacement of the regular AVSS pins.

2 Disclaimer

Typical values contained in this datasheet are based on simulation and characterization

results of other AVR microcontrollers and radio transceivers manufactured in a similar

process technology. Minimum and Maximum values will be available after the device is

characterized.

1

[PF3:ADC3:DIG4]

[PF2:ADC2:DIG2]

2

3

[PF5:ADC5:TMS]

[PF4:ADC4:TCK]

4

5

[PF7:ADC7:TDI]

[PF6:ADC6:TDO]

6

7

[RFP]

[AVSS_RFP]

8

9

[AVSS_RFN]

[RFN]

10

11

[RSTN]

[TST]

12

13

14

[RSTON]

[PG0:DIG3]

56 55 54 53 52 51

62 61 60 59 58 57

64 63

ATmega256/128/64RFR2

Exposed paddle: [AVSS]

[DVSS]

[PE0:RXD0:PCINT8]

[PE1:TXD0]

[PE2:XCK0:AIN0]

[CLKI]

[DEVDD]

[DVSS]

[PB0:SSN:PCINT0]

[PB1:SCK:PCINT1]

[PB2:MOSI:PDI:PCINT2]

[PB3:MISO:PDO:PCINT3]

[PB4:OC2A:PCINT4]

[PB5:OC1A:PCINT5]

[PB6:OC1B:PCINT6]

31 32

17 18 19 20 21

23

22

24 25 26 27

0

28

42

41

40

39

38

37

36

35

34

33

48

47

46

45

15

16

[PG1:DIG1]

[PG2:AMR]

[PB7:OC0A:OC1C:PCINT7]

[DEVDD]

44

43

29

0

30

50 49

Index corner