■ DESCRIPTION
The Fujitsu MB15F78SP is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2550 MHz prescaler and a 1200 MHz prescaler. A 32/33 or a 64/65 for the 2550 MHz prescaler, and a 16/17 or a 32/33 for the 1200 MHz prescaler can be selected for the prescaler that enables pulse swallow operation.
The BiCMOS process is used , as a result a supply current is typically 5.5 mA at 2.7 V. The supply voltage range is from 2.4 V to 3.6 V. A refined charge pump supplies well-balanced output current with 1.5 mA and 6 mA selectable by serial data.
The new package (BCC20) decreases an area of MB15F78SP more than 30 % comparing with the former BCC16 (for dual PLL).
MB15F78SP is ideally suited for wireless mobile communications, such as GSM.

■ FEATURES
• High frequency operatio : RX synthesizer : 2550 MHz max : TX synthesizer : 1200 MHz max
• Low power supply voltage : VCC = 2.4 to 3.6 V
• Ultra Low power supply current : ICC = 5.5 mA typ. (VCC = Vp = 2.7 V, Ta = +25°C, SWTX = SWRX = 0, in TX/RX locking state)
• Direct power saving function : Power supply current in power saving mode Typ. 0.1 µA (VCC = Vp = 2.7 V, Ta = +25°C), Max. 10 µA (VCC = Vp = 2.7 V)
• Software selectable charge pump current: 1.5 mA/6.0 mA typ.
• Dual modulus prescaler : 2550 MHz prescaler (32/33 or 64/65 )/1200 MHz prescaler (16/17 or 32/33)
• 23-bit shift register
• Serial input binary 14-bit programmable reference divider : R = 3 to 16,383
• Serial input programmable divider consisting of:
    - Binary 7-bit swallow counter : 0 to 127
    - Binary 11-bit programmable counter: 3 to 2,047
• Built-in high-speed tuning, low-noise phase comparator, current-switching type constant current circuit
• On–chip phase control for phase comparator
• Built-in digital locking detector circuit to detect PLL locking and unlocking
• Operating temperature : Ta = –40 to +85°C
• Sireal data format compatible with MB15F08SL